微机原理及应用 （the principle and application of microcomputer）

出版信息

书名：微机原理及应用(The Principle and Application of Microcomputer)

书号：978-7-118-10410-3

作者：丁艳

出版时间：2016年1月

译者：

版次：1版1次

开本：16

装帧：平装

出版基金：

页数：330

字数：490

中图分类：TP36

丛书名：

定价：58.00

内容简介

本书以16 位微处理器为核心，全面讲述了微型计算机的基本组成、工作原理以及硬件接口技术。全书共8 章，逐一讲述了计算机基础知识、微型计算机的基本组成及工作原理、16 位微处理器8086 /8088CPU 的寻址方式、指令系统、汇编程序的设计、输入/输出接口、存储器系统和可编程定时/计数控制器等内容。本书是作者多年教学经验的结晶，内容编排合理，由浅入深，体系完整，重点突出并配有丰富的例题及详尽的注释。

编辑推荐

本书采用全英文编写，并配有部分汉语注释，适合用作普通高等院校非计算机类各专业学生“微型计算机原理及应用”课程的教材，也可用作成人高等教育的培训教材及广大科技工作者的参考书。

目录

Chapter 1Fundamentals of Computer1

1.1Number System1

1.1.1Basic Number Systems1

1.1.2Conversions between Different Number Systems 3

1.1.3Common Data Units7

1.2Logic Algebra and Logic Gates9

1.2.1“OR” Operation and “OR” Gate10

1.2.2“AND” Operation and “AND” Gate10

1.2.3“NOT” Operation and the NOT Inverter11

1.2.4Basic Rules of Boolean Algebra12

1.3Binary Numbers and Binary Addition/Subtraction13

1.3.1Negative Binary Numbers13

1.3.2Binary Addition14

1.3.3Binary Subtraction14

1.3.4Adder Circuits15

1.3.5Switchable Inverter and Binary Addition/Subtraction Circuit16

1.4Computer Data Formats17

1.4.1ACSII Code17

1.4.2BCD (Binary Coded Decimal) Format19

1.5Logic Circuit19

1.5.1Logic Gates19

1.5.2Flip Flops19

1.5.3Registers23

1.5.4Tri state Gate and BUS Structure25

Tips29

Exercise30

Chapter 2System Organization of

Microcomputer32

2.1The Basic System Components32

2.1.1CPU (Central Processing Unit)33

2.1.2The System Bus33

2.1.3The Memory Subsystem35

2.1.4The I/O Subsystem38

2.2A Simple Computer41

2.2.1Introduction 41

2.2.2Architecture of the Simple Computer 41

2.2.3Instruction Set of the Simple Computer45

2.2.4Encoding Instructions46

2.2.5Organization of the Control Unit47

2.2.6Step by Step Instruction Execution49

Tips51

Exercise 52

Chapter 3Intel 8086 Microprocessor54

3.1The History of Intel Microprocessor Family 54

3.28086 CPU Architecture59

3.2.1Execution Unit and Bus Interface Unit59

3.2.2Organization of Execution Unit61

3.2.3Organization of Bus Interface Unit (BIU)64

3.3Internal Memory66

3.3.1Addressing Data in Memory66

3.3.2Memory Segment67

3.3.3Segment Boundary68

3.3.4Segment Offset68

3.3.5About Stack Segment71

3.4System Timing72

3.4.1The System Clock72

3.4.2Memory Access Time73

3.4.3Wait States73

3.4.4Bus Cycle75

3.58086 Pin Assignments and Working Modes75

3.5.1Pins and Their Function Descriptions76

3.5.2Working Modes78

3.6Basic Operations of 8086/808888

3.6.1Reset Operation88

3.6.2Input and Output for 8086 Minimum Mode89

3.6.3Bus Request and Bus Grant Timing in Minimum Mode 91

3.6.4Interrupt Operation92

3.6.5Interrupt Operations in Maximum Mode97

Tips99

Exercise100

Chapter 48086 Address Mode and Assembly Instructions103

4.18086 Assembly Instruction Format103

4.28086 Addressing Modes104

4.2.1Immediate Addressing105

4.2.2Direct Addressing105

4.2.3Register Addressing106

4.2.4Register Indirect Addressing106

4.2.5Register Relative Addressing107

4.2.6Base plus Index Addressing108

4.2.7Base Relative plus Index Addressing 109

4.3Data Movement Instructions112

4.3.1MOV Instruction112

4.3.2PUSH and POP114

4.3.3XCHG Instruction115

4.3.4XLAT Instruction115

4.3.5LEA Instruction117

4.3.6LDS and LES118

4.3.7Flags Register Movement Instruction119

4.3.8IN and OUT120

4.4Arithmetic Instructions and Logic Instructions120

4.4.1ADD and SUB Function121

4.4.2INC and DEC Function124

4.4.3NEG and CMP Function124

4.4.4MUL and DIV Function126

4.4.5Type Conversion Functions127

4.4.6BCD Conversion Functions128

4.4.7Boolean Operations132

4.4.8Shifting and Rotation134

4.5String Instructions137

4.5.1The Direction Flag138

4.5.2String Data Transfers139

4.5.3String Comparisons140

4.6Program Control Instructions144

4.6.1Program Flow Control Instructions144

4.6.2Machine Control and Miscellaneous Instructions154

4.7The Symbolic Instruction Set 156

Tips158

Exercise159

Chapter 5Directives and Macro Processing163

5.1The Format of the Directives163

5.2Operators and Expression165

5.3Directives171

5.3.1Data Definition and Storage Allocation172

5.3.2EQU Directive174

5.3.3Segment Definition Directive175

5.3.4Assume Directive176

5.3.5PROC Directive 177

5.3.6END Directive178

5.3.7ORG Directive178

5.3.8Structures180

5.3.9Records182

5.3.10The PAGE and TITLE Listing Directives185

5.3.11EXTRN/EXTERN Directive185

5.3.12GROUP Directive185

5.3.13INCLUDE Directive186

5.3.14LABEL Directive186

5.4Macro Processing188

5.4.1Macro Definition188

5.4.2Macro Sequence and Procedure Calling191

5.4.3Macro Directives191

5.5DOS Function Calls193

5.5.1The IBM PC BIOS193

5.5.2An Introduction to MS DOS’ Services194

5.5.3MS DOS Calling Sequence195

5.5.4Frequently Used MS DOS Functions195

5.6Assembling, Linking and Executing a Program197

5.6.1The Assembler and Linker197

5.6.2Assembling a Source Program199

5.6.3Linking an Object Program199

5.6.4Executing a Program200

5.6.5Using the DEBUG Program200

5.6.6DEBUG Commands Exercise201

Tips204

Exercise205

Chapter 6Programming with Assembly Language207

6.1Design of Assembly Program207

6.2Simple Procedures Designing208

6.3Branch and Looping Procedures209

6.4Procedure Call and Return216

6.5Programming Examples220

Tips227

Exercise228

Chapter 7Memory System229

7.1Overview of the Memory229

7.1.1Non Volatile Memory230

7.1.2Volatile Memory232

7.1.3Performance Index of Memory System233

7.2Memory Devices235

7.2.1SRAM 6264235

7.2.2SRAM 6116240

7.2.3DRAM 2164A242

7.2.4EPROM 2764A243

7.3Memory Module Design245

7.3.1Memory Pin Connections245

7.3.2Memory Module Design247

7.3.3Memory Expansion Examples248

Tips251

Exercise251

Chapter 8I/O Interfaces253

8.1I/O Instructions254

8.2I/O Interfacing Methods256

8.3Serial Interface and Serial Communication257

8.3.1Serial Interface257

8.3.2Basic Serial Transmission Lines258

8.3.3Asynchronous and Synchronous Communication258

8.48251A Programmable Communication Interface261

8.4.1The Architecture of the 8251A261

8.4.2The Application of the 8251A266

8.4.3The Initialization of the 8251A271

8.5Parallel Communication Interface275

8.68255A Programmable Peripheral Interface276

8.6.1The Architecture of the 8255A276

8.6.2The Function Description of the 8255A280

8.6.3The Communication Mode of 8255A282

8.6.4The Initialization and Programming of 8255A288

8.7Programmable Timer and Event Counter289

8.8Intel’s 8253 Programmable Timer/Counter291

8.8.1The Architecture of 8253292

8.8.2The Operation Mode Definition of 8253296

8.8.3Examples of 8253 Timer/Counter302

Tips305

Exercise306

Appendix A8086/8088 Instruction Set Summary308

Appendix BVocabulary and Terms 322

Reference330"